A common semiconductor configuration involves a single polysilicon layer having two n-type doped regions separated by a p-type region (i.e., an n/p/n configuration). This configuration is typically employed in back-to-back diode load resistors in a Static Random Access Memory (SRAM) cell, although other applications exist.
To construct the n/p/n configuration, a polysilicon layer is first doped with a p-type impurity. Next, an oxide layer is formed on the polysilicon layer and etched to define a mask over a central p-type impurity region. An n-type impurity is then implanted into the unmasked regions of the polysilicon layer. Generally, the concentration of the n-type impurity (n+) is considerably greater than the concentration of the p-type impurity (p-), resulting in an n+/p-/n+ configuration.
A problem arises during the construction of the n+/p-/n+ configuration in that the n+ impurity diffuses into the p- impurity region along the polysilicon grain boundaries. Conventional SRAM cells employ back-to-back diode resistors having a length of approximately five microns. On this scale, the diffusion of the n+ impurity does not cause a significant problem. However, as new technology enables the construction of smaller scale SRAM cells, the back-to-back diode resistor is expected to have a length of approximately two microns or less. On this smaller scale, the n+ impurity diffusion into the p- impurity region poses a significant problem.
One conventional approach to solving the diffusion problem is illustrated in FIGS. 1-4. FIG. 1 illustrates a wafer fragment 10 comprising an underlying layer 12 and a polysilicon layer 14. Polysilicon layer 14 is everywhere doped with a p- impurity. As shown in FIG. 2, oxygen is implanted into polysilicon layer 14. Next, an oxide layer is deposited on polysilicon layer 14 and etched to form an oxide mask 16 as shown in FIG. 3. Oxide mask 16 defines a central p- region 18.
An n+ impurity is then implanted into the unmasked regions of polysilicon layer 14. Oxide mask 16 prevents the n+ impurity from being implanted into central p- region 18, thereby defining boundaries 20 between the p- doped polysilicon and the n+ doped polysilicon. The oxygen restricts the diffusion of the n+ impurity into p- region 18. Thereafter, oxide mask 16 is removed. As shown in FIG. 4, the resultant polysilicon layer 14 comprises three regions: two n+ regions 22a and 22b separated by p- region 18.
The above described method has a serious drawback in that the implanted oxygen is an insulating material which can have a significant detrimental effect within the p- region 18 and correspondingly on the desired effectiveness of the resistor. This implantation can damage the p- region 18, and may detrimentally impact the overall conductivity/resistance characteristics of the n+/p-/n+ device.
These and other drawbacks associated with the prior art are undesired and should be obviated.